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Friday, March 2, 2012
 

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12:15pm
  Dynamic Optimization for Irregular Applications on Many-Core  
(Seminar/Conference)

Zheng (Eddy) Zhang

Department of Computer Science

College of William and Mary

Abstract:
Enhancing the match between software executions and hardware features is key to computing efficiency in terms of both performance and energy consumption. The match is constantly complicated by emerging architecture features in computing systems and has become a continuously evolving problem. In this talk, I will present some recent findings in the implications of three prominent features of modern systems: the heterogeneity, the rapid growth of processor-level parallelism and the increasingly complex interplay among computing units. In particular, I will focus on how to streamline computations containing dynamic irregularities for General Purpose Graphic Processing Units (GPGPUs), a broadly adopted many-core architecture. The talk will begin with the theoretical foundations of GPGPU program-level transformation techniques, and further describe a runtime optimization system, named G-Streamline, as a unified software solution to irregularities in both memory references and control flows. The system enables on-the-fly elimination of irregularities through adaptive CPU-GPU pipelining and kernel splitting schemes. Working in a holistic fashion, it maximizes whole-program performance by resolving conflicts among optimizations. In the end, I will briefly describe my other work which includes a study of the influence of shared cache on multicore and a new paradigm, named shared- cache-aware optimizations, for parallel software locality enhancement.

Bio:

Zheng (Eddy) Zhang is a PhD candidate at the Computer Science Department of the College of William & Mary. She received her M.S. in Computer Science at William & Mary with a Computational Operations Research (COR) specialization. Her research generally lies in the area of compilers and programming systems, with a focus on revealing and exploiting the implications of emerging hardware features on the development, compilation, and execution of software. She is the lead author of a paper that won the Best Paper Award at PPoPP'10, and a recipient of a Google Anita Borg Memorial Scholarship


Location: Torgerson 2150
Contact: T. M. Murali
E-Mail: murali@cs.vt.edu
5402318534
   
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